Compact models are an important tool for use in the design of integrated circuits by simulating how such circuits may perform during use. In particular, compact models enable the reproduction of the thermal behavior of components within an integrated circuit package for use in a wide variety of system-level simulations. Such functionality is provided without having to provide detailed modeling of system level computational fluid dynamics.
One type of compact model is the DELPHI style compact model which has been proposed by the JEDEC Council for used in connection with single chip packages. Such compact network models are boundary condition independent and ensure that junction temperatures are predicted within 10% variance from predicted detailed package temperatures. With the recent trend of packing more and more functionality onto a single package, multi-chip module (MCM) IC packages (e.g., system-on-chips, etc.) having more than one functional block (chip) are becoming more prevalent. However, boundary condition-independent modeling techniques such as DELPHI have been conventionally limited to single chip IC packages.